enable ENET port on FRDM_IMX93 board #97535
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JiafeiPan
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Oct 14, 2025
JiafeiPan
commented
- added new phy driver for Motorcomm YT8521
- enabled ENET ethernet port on FRDM_IMX93 board.
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Zhiqiang-Hou,
dbaluta,
decsny,
dleach02,
iuliana-prodan,
lmajewski,
maass-hamburg,
mbolivar,
pdgendt,
rruuaanng and
yangbolu1991
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| .read = mc_ytphy_read, | ||
| .write = mc_ytphy_write, | ||
| }; | ||
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I already said it at the former pr, please look, if that is really needed. Also if it is just the init that is a bit different (I suspect that), please try to be as close to the generic ethernet driver, that is in tree as possible. It's easier to maintain the long therm.
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Hi, @maass-hamburg , updated the driver to be close with generic ethernet phy driver please review again, thanks.
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| } | ||
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| #if ANY_FIXED_LINK | ||
| static int mc_ytphy_initialize_fixed_link(const struct device *dev) |
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in fixed link, we don't communicate or control the phy. Because of that we don't need it (and want it) at the other phy drivers, that are not generic
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Per my understanding, fixed-link should be a fixed speed configurated by dts node property, but it doesn't mean that PHY only supports this speed, so we need to configure PHY register BMCR to to let PHY hardware to work in the speed parsed from dts nodes, otherwise, which PHY hardware knows which speed will run.
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the dt prop description is This link is fixed and does not require PHY configuration. It is a way to set a fixed speed, so the ethernet driver can configure itself, if needed, basically just a dummy phy. Please don't reuse this dt prop for other functionality.
| static int mc_ytphy_get_features(const struct device *dev) | ||
| { | ||
| struct mc_ytphy_data *data = dev->data; | ||
| uint32_t val = 0; | ||
| int ret; | ||
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| ret = mc_ytphy_read(dev, MII_BMSR, &val); | ||
| if (ret) { | ||
| return ret; | ||
| } | ||
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| BIT_SET(val & MII_BMSR_100BASE_X_FULL, data->phy_feature, LINK_FULL_100BASE); | ||
| BIT_SET(val & MII_BMSR_100BASE_X_HALF, data->phy_feature, LINK_HALF_100BASE); | ||
| BIT_SET(val & MII_BMSR_10_FULL, data->phy_feature, LINK_FULL_10BASE); | ||
| BIT_SET(val & MII_BMSR_10_HALF, data->phy_feature, LINK_HALF_10BASE); | ||
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| if ((val & MII_BMSR_EXTEND_STATUS) == 0) { | ||
| return 0; | ||
| } | ||
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| ret = mc_ytphy_read(dev, MII_ESTAT, &val); | ||
| if (ret) { | ||
| return ret; | ||
| } | ||
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| BIT_SET(val & MII_ESTAT_1000BASE_T_FULL, data->phy_feature, LINK_FULL_1000BASE); | ||
| BIT_SET(val & MII_ESTAT_1000BASE_T_HALF, data->phy_feature, LINK_HALF_1000BASE); | ||
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| return 0; | ||
| } |
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unneded, we already know, that this phy supports 10 100 and 1000
| #define BIT_SET(t, v, b) \ | ||
| do { \ | ||
| if (t) { \ | ||
| (v) |= (b); \ | ||
| } \ | ||
| } while (0) | ||
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| #define BIT_SET_CLR(t, v, b) \ | ||
| do { \ | ||
| if (t) { \ | ||
| (v) |= (b); \ | ||
| } else { \ | ||
| (v) &= ~(b); \ | ||
| } \ | ||
| } while (0) |
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we already have IS_BIT_SET or WRITE_BIT in include/zephyr/sys/util_macro.h, use them, don't define your own
Some private features could be leveraged, such as PM and clock delay configuration. |
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Add PHY driver for Motorcomm YT8521 which is used on FRDM_IMX93 board. Signed-off-by: Hongbo Wang <[email protected]> Signed-off-by: Jiafei Pan <[email protected]> Signed-off-by: Chekhov Ma <[email protected]>
Enable ENET port on FRDM_IMX93 board. Signed-off-by: Hongbo Wang <[email protected]> Signed-off-by: Chekhov Ma <[email protected]> Signed-off-by: Jiafei Pan <[email protected]>
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